Implementación 7 funciones de tranferencia en VHDL

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-- D C B A | F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7
-- 0 0 0 0 | 1  | 1  | 1  | 1  | 1  | 1  | 1  | 1
-- 0 0 0 1 | 0  | 1  | 1  | 1  | 1  | 1  | 1  | 1
-- 0 0 1 1 | 0  | 0  | 0  | 1  | 1  | 1  | 1  | 1
-- 0 1 0 0 | 0  | 0  | 0  | 0  | 1  | 1  | 1  | 1
-- 0 1 0 1 | 0  | 0  | 0  | 0  | 0  | 1  | 1  | 1
-- 0 1 1 0 | 0  | 0  | 0  | 0  | 0  | 0  | 1  | 1
-- 0 1 1 1 | 0  | 0  | 0  | 0  | 0  | 0  | 0  | 1
-- 1 0 0 0 | 0  | 0  | 0  | 0  | 0  | 0  | 0  | 0
-- 1 0 0 1 | 0  | 0  | 0  | 0  | 0  | 0  | 0  | 1
-- 1 0 1 0 | 0  | 0  | 0  | 0  | 0  | 0  | 1  | 1
-- 1 0 1 1 | 0  | 0  | 0  | 0  | 0  | 1  | 1  | 1
-- 1 1 0 0 | 0  | 0  | 0  | 0  | 1  | 1  | 1  | 1
-- 1 1 0 1 | 0  | 0  | 0  | 1  | 1  | 1  | 1  | 1
-- 1 1 1 0 | 0  | 0  | 1  | 1  | 1  | 1  | 1  | 1
-- 1 1 1 1 | 0  | 1  | 1  | 1  | 1  | 1  | 1  | 1
-- Considere los siguientes aspectos:
-- • No utilice librerías ni paquetes
-- • Utilice entradas y salidas tipo bit
-- • Obtenga las ecuaciones de F0 hasta F7 utilizando la estructura when-else    
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Problema2 is
    Port ( A : in  BIT;
           B : in  BIT;
           C : in  BIT;
           D : in  BIT;
           F0 : out  BIT;
           F1 : out  BIT;
           F2 : out  BIT;
           F3 : out  BIT;
           F4 : out  BIT;
           F5 : out  BIT;
           F6 : out  BIT;
           F7 : out  BIT);
end Problema2;

architecture Flujo of Problema2 is
begin
f0<='1'  when( d='0'    and   c='0'    and   b='0'    and   a='0')   else '0';

f1<='1'  when( d='0'    and   c='0'    and b='0'    and   a='0')   else '1'
         when( d='0'    and   c='0'    and b='0'    and   a='1')   else '1'
     when( d='1'    and   c='1'    and b='1'    and   a='1')   else '0';

f2<='1'  when( d='0'    and   c='0'    and b='0'    and   a='0')   else '1'
         when( d='0' and c='0' and b='0' and a='1') else '1'
     when( d='0' and c='0' and b='1' and a='0') else '1'
     when( d='1' and c='1' and b='1' and a='0') else '1'
     when( d='1' and c='1' and b='1' and a='1') else '0';

f3<='1' when( d='0' and c='0' and b='0' and a='0') else '1'
         when( d='0' and c='0' and b='0' and a='1') else '1'
     when( d='0' and c='0' and b='1' and a='0') else '1'
     when( d='0' and c='0' and b='1' and a='1') else '1'
     when( d='1' and c='1' and b='0' and a='1') else '1'
     when( d='1' and c='1' and b='1' and a='0') else '1'
     when( d='1' and c='1' and b='1' and a='1') else '0';

f4<='1' when( d='0' and c='0' and b='0' and a='0') else '1'
         when( d='0' and c='0' and b='0' and a='1') else '1'
     when( d='0' and c='0' and b='1' and a='0') else '1'
         when( d='0' and c='0' and b='1' and a='1') else '1'
     when( d='0' and c='1' and b='0' and a='0') else '1'
     when( d='1' and c='1' and b='0' and a='0') else '1'
     when( d='1' and c='1' and b='0' and a='1') else '1'
     when( d='1' and c='1' and b='1' and a='0') else '1'
     when( d='1' and c='1' and b='1' and a='1') else '0';

f5<='0' when( d='0' and c='1' and b='1' and a='0') else '0'
         when( d='0' and c='1' and b='1' and a='1') else '0'
     when( d='1' and c='0' and b='0' and a='0') else '0'
     when( d='1' and c='0' and b='0' and a='1') else '0'
     when( d='1' and c='0' and b='1' and a='0') else '1';

f6<='0' when( d='0' and c='1' and b='1' and a='1') else '0'
      when( d='1' and c='0' and b='0' and a='0') else '0'
      when( d='1' and c='0' and b='0' and a='1') else '1';

f7<='0' when( d='1' and c='0' and b='0' and a='0') else '1';
end Flujo;


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NET "F0" LOC = W21;
NET "F1" LOC = Y22;
NET "F2" LOC = V20;
NET "F3" LOC = V19;
NET "F4" LOC = U19;
NET "F5" LOC = U20;
NET "F6" LOC = T19;
NET "F7" LOC = R20;
NET "A" LOC = V8;
NET "B" LOC = U10;
NET "C" LOC = U8;
NET "D" LOC = T9;

# PlanAhead Generated physical constraints